Wednesday, July 30, 2008

Latch & Flip-Flops

Latch & Flip-Flops

Besides from the circuit input and output signals, there are normally two other important signals, reset and clock, in the sequential circuit. The reset signal is either active-high or active-low status and the circuit status transition can occur at either clock rising-edge or falling-edge. Flip-Flop is a basic component of the sequential circuits.
Simple Latch
Behavior Code
Test Bench
Behvaior Simulation
Gate-level Implementation
Gate-level Simulation
D Flip-Flop
Behavior Code
Test Bench
Behavior Simulation
Gate-level Implementation
Gate-level Simulation
JK Flip-Flop
Behavior Code
Test Bench
Behavior Simulation
Gate-level Implementation
Gate-level Simulation

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